India's semiconductor push explained: projects and risks

India’s semiconductor push is a government-backed effort to build chip manufacturing at home, starting not with the world’s most advanced chips but with the factories that package and test them, plus one mature-node wafer fab. As of October 2026, 12 manufacturing projects worth about ₹1.64 lakh crore have been approved, three are in commercial production, and the first silicon fab, Tata Electronics’ plant at Dholera in Gujarat, is scheduled to be commissioned in 2028. A second, larger phase called Semicon 2.0, with an outlay of ₹1,27,500 crore, was approved in July 2026.

Why chips matter so much

Semiconductors are the switching and memory elements inside almost every electronic device: phones, cars, power grids, telecom networks and the servers that run AI. When supply breaks, everything downstream stalls. A February 2026 PIB research backgrounder notes that the pandemic-era chip shortage hit more than 169 industries, and that Taiwan alone makes over 60% of the world’s semiconductors and nearly 90% of the most advanced ones.

That concentration is the real reason governments, from the US to Japan to India, are paying companies to build plants on their soil. The goal is less about cheaper chips and more about not being cut off. The same PIB note puts India’s semiconductor market at about $45–50 billion in 2024–25, with industry estimates of $100–110 billion by 2030.

The value chain in three steps

A chip goes through three broad stages, done by very different kinds of companies.

Stage	What happens	Share of industry value added*	What it takes
Design	Engineers specify and verify the circuit using electronic design automation (EDA) software	About 50%	Skilled engineers, software tools, IP
Wafer fabrication (“fab”, front end)	Circuits are printed onto silicon wafers in ultra-clean rooms through hundreds of steps	About 24–25%	$5–20 billion per plant, pure water, stable power
Assembly, testing and packaging (ATMP/OSAT, back end)	Wafers are cut into chips, packaged, tested and shipped	About 6%	Less capital, more labour and process discipline

*Figures from the SIA and BCG study of 2021, which also attributes about 11% to equipment and smaller shares to EDA tools, IP and materials. The same study estimates that a modern fab costs roughly $5 billion (advanced analogue) to $20 billion (advanced logic and memory).

Two terms come up constantly. ATMP (assembly, testing, marking and packaging) and OSAT (outsourced semiconductor assembly and test) both mean the back end; OSAT simply signals a company that does this work for other chipmakers. A node such as “28 nm” is a label for a generation of manufacturing technology; smaller numbers generally mean denser, more advanced chips.

What India already has, and what it lacks

India’s strength is design. The Carnegie Endowment’s review of the mission notes that India houses about 20% of the global chip design workforce, but adds that much of this work executes specifications for multinationals, and that “creating and owning the underlying intellectual property in India itself remains elusive.”

What India lacked until 2026 was any commercial-scale manufacturing: no high-volume fab and, until Micron’s Sanand plant opened, no large ATMP unit under the mission. It also lacks most of the supporting industry — specialised gases, chemicals, equipment makers and repair shops — that clusters around fabs in Taiwan, South Korea and Japan. Semicon 2.0 is aimed squarely at that gap.

How the incentives work

The first programme, approved by the Union Cabinet in December 2021 with an outlay of ₹76,000 crore, offers what the PIB backgrounder describes as fiscal support of up to 50% of project cost for:

silicon wafer fabs (advanced and mature nodes),
display fabs (AMOLED and LCD),
compound semiconductor fabs and ATMP/OSAT units,
chip design, through the Design Linked Incentive (DLI) scheme, which offers up to ₹15 crore per company.

In practice this means the government shares a large part of the capital cost; companies still have to raise the rest and run the plant. Gujarat and other states have their own semiconductor policies on top.

Semicon 2.0, approved on 15 July 2026, carries an outlay of ₹1,27,500 crore. According to the Cabinet release, it rests on six pillars: chip design and IP, equipment and materials, more fabs (silicon, compound, discrete and display), advanced packaging, research toward more advanced nodes, and talent. The release did not set out component-wise subsidy rates.

Every approved project, and where it stands

Status as of early October 2026. Investment figures are approved project costs, not the subsidy.

#	Company (partner)	Location	Type	Investment	Approved	Status
1	Micron Technology	Sanand, Gujarat	ATMP for DRAM and NAND memory	₹22,516 cr	Jun 2023	Commercial production since Feb 2026
2	Tata Electronics (PSMC, Taiwan)	Dholera, Gujarat	Silicon fab, 28 nm and mature nodes, 50,000 wafer starts/month	₹91,526 cr	Feb 2024	Under construction; commissioning scheduled for 2028
3	Tata Semiconductor Assembly and Test	Jagiroad, Morigaon, Assam	OSAT, up to 48 million chips/day	₹27,120 cr	Feb 2024	Pilot production reported Oct 2026; formal launch expected Dec 2026–Jan 2027
4	CG Power (Renesas, Japan; Stars, Thailand)	Sanand, Gujarat	OSAT	₹7,584 cr	Feb 2024	Commercial production since Jul 2026
5	Kaynes Semicon	Sanand, Gujarat	OSAT, ~6.3 million chips/day at peak	₹3,307 cr	Sep 2024	Commercial production since Mar 2026
6	HCL–Foxconn JV (Vama Sundari Investments)	Near Jewar, Uttar Pradesh	Display driver chips, 20,000 wafers/month	₹3,706 cr	May 2025	Under execution
7	SiCSem (Clas-SiC, UK)	Bhubaneswar, Odisha	Silicon carbide compound fab + packaging	₹2,066 cr	Aug 2025	Under execution
8	3D Glass Solutions	Bhubaneswar, Odisha	Advanced packaging, glass substrates	₹1,943 cr	Aug 2025	Under execution
9	Continental Device India (CDIL)	Mohali, Punjab	Discrete power devices (expansion)	₹117 cr	Aug 2025	Under execution
10	Advanced System in Package Technologies (APACT, South Korea)	Andhra Pradesh	OSAT, 96 million units/year	₹480 cr	Aug 2025	Under execution
11	Crystal Matrix	Dholera, Gujarat	GaN mini/micro-LED display fab + ATMP	₹3,936 cr combined with #12	May 2026	Approved
12	Suchi Semicon	Surat, Gujarat	OSAT for discrete chips	(see #11)	May 2026	Approved

Sources: project details and investments from the PIB February 2026 backgrounder and Cabinet releases of February 2024, August 2025 and May 2026; production status from the Semicon 2.0 Cabinet release (Micron, Kaynes and CG Semi in commercial production), Micron, the India Semiconductor Mission site, and, for Assam, the Chief Minister’s statement reported by Pratidin Time.

Three patterns stand out. First, nine of the 12 projects are packaging and test units, the cheapest and fastest part of the chain to build. Second, Gujarat hosts six of them. Third, only one project, Tata–PSMC at Dholera, is a conventional silicon wafer fab — which is why it carries more than half of the total investment.

What is actually being made

The operating plants are producing real products, not prototypes. Micron’s Sanand unit converts DRAM and NAND wafers made elsewhere in its global network into finished memory and storage products; its first made-in-India memory modules went to Dell for laptops assembled in India, according to the company. Kaynes began with intelligent power modules used in automotive and industrial equipment, each integrating 17 chips, as reported by CRN Asia.

This matters for interpreting headlines. A “made in India chip” from an ATMP plant means the chip was packaged and tested here; the silicon die itself was usually fabricated abroad. That is a genuine and valuable step, but it is not the same as wafer fabrication, which India will not do at commercial scale until Dholera starts.

Timelines: how realistic are they?

The track record so far is mixed but improving. Micron was approved in June 2023 and began commercial production in February 2026, roughly 32 months later. CG Power’s unit was approved in February 2024 and, as The Tech Portal reported, began commercial production in July 2026, about 29 months later. Kaynes took about 19 months from approval to production. Back-end plants can move at that pace.

Fabs cannot. Dholera was approved in February 2024 and the government now says the first fab is “scheduled to be commissioned in 2028”. Even then, a new fab typically takes many more months to reach steady, high-yield output. The government’s broader ambitions — a stated roadmap toward 3 nm and 2 nm nodes and being among the top semiconductor nations by 2035, per the PIB backgrounder — are long-range targets, not plans with approved projects behind them yet.

The risks

Water. Fabs need very large volumes of ultra-pure water. Tata’s Dholera fab, according to its environmental-appraisal file as reported in a Statesman opinion piece, has a total water requirement of about 17,549 kilolitres a day, of which about 6,571 is fresh water and the rest recycled, to be supplied from the Narmada canal system because the local groundwater is saline. The piece argues that India approves such projects one by one without a basin-level water budget.

Power. Fabs run around the clock and are highly sensitive to voltage dips; even brief interruptions can scrap wafers in process. Grid quality and dedicated supply in new industrial zones like Dholera will be tested.

Talent. India trains many designers but few people who have run a fab line. Government schemes are trying to close this: the Chips to Startup programme says over 68,000 students have been trained on design tools, a NIELIT Calicut lab has trained more than 62,000 engineers against a target of one lakh, and a programme with Lam Research aims to train 60,000 people over ten years, according to PIB. Experienced fab engineers, however, will initially come from partners like PSMC.

Ecosystem and demand. A fab needs dozens of suppliers nearby, and it needs customers who commit to buying its output. Mature-node chips (28 nm and above) are a crowded global market. India’s own electronics manufacturing is growing, but long-term purchase commitments will decide whether these plants run full.

Concentration and dependence. Most technology is licensed from foreign partners — PSMC, Renesas, Clas-SiC, APACT. That is normal for a late entrant, but, as Carnegie notes, owning the underlying IP is a separate and harder goal.

Why design is the quieter story

While factories get the headlines, design support may matter as much. The DLI scheme has approved 24 design projects and given 105 start-ups and MSMEs access to industry EDA tools; by April 2026, 211 chips had been taped out by 75 institutions, per PIB’s August 2026 backgrounder. Some of those start-ups are designing chips for satellite communications, drones and smart meters — products that tie into India’s push on satellite internet and its digital public infrastructure. Demand for AI hardware, explained in our guide to how large language models work, is another reason governments now treat chips as strategic.

What to watch next

Whether Tata’s Assam plant formally launches by early 2027, making it the fourth operating unit.
Construction milestones at Dholera, including tool installation, ahead of 2028.
The first Semicon 2.0 approvals, especially any second fab or any equipment and materials suppliers.
Whether incentive rates under Semicon 2.0 differ from the 50% model of the first phase.

The point: India has moved from announcements to working factories, but almost all of them are assembly and test plants, not wafer fabs. The real test is Dholera in 2028, and whether water, power, skilled people and committed buyers arrive on time. Read every “first Indian chip” headline with one question: was the silicon made here, or only packaged here?